Flip-Flops (PHC504)- Daily Practice problems

Model Questions on Flip-flops

  1. Draw the circuit of the R S flip-flop with NOR gates and discuss the behavior of this circuit.
  2. Discuss various types of races in asynchronous flip-flops.
  3. What is the difference between asynchronous and synchronous flip-flops? Draw and explain the clocked R S flip-flop with NOR latch.
  4. Explain the behavior of the R S flip-flop with the NAND gate.
  5. Modify an asynchronous R S flip-flop so that when both the inputs R and S are 1, the flip-flop is reset.
  6. Discuss the edge detector circuits for triggering the flip-flops.
  7. Draw and explain the D flip-flop with NAND latch.
  8. How does a J K flip-flop differ from an S R flip-flop in its basic operation? What are its advantages over the S R flip-flop?
  9. Discuss standard J K flip-flop with NOR latch and show that for inputs J K = 11, the complementation in the output will be obtained when the width of the clock pulse is less than the delay in the latch.
  10. What do you mean by level trigger flip-flop? How does it differ from an edge-trigger flip-flop?
  11. Discuss the edge trigger J K flip-flop.
  12. What is the purpose of asynchronous inputs in flip-flop? How do these inputs work?
  13. What is a master-slave flip-flop? Discuss its working.
  14. Describe the working of the edge trigger T flip-flop. How can a T flip-flop be used as a divide-by-two device?
  15. What is an excitation table? How the excitation tables for R S, J K, D, and T type flip-flops are formed?
  16. Define the following terms related to flip-flops.
    • (i) Propagation delay time
    • (ii) Set up time
    • (iii) Hold time
    • (iv) Maximum clock frequency
    • (v) Pulse width
  17. Discuss the method of converting one type of flip-flop to another type. Convert J K flip-flop to D flip-flop.
  18. Carry out the following conversions: (i) D to J K FF (ii) D to R S FF (iii) T to R S FF (iv) R S to D FF
  19. Carry out the following conversions: (i) T to D FF (ii) J K to D FF (iii) J K to T FF (iv) R S to T FF
  20. A J K flip-flop can be used as R S flip-flop, but R S flip-flop can not be used as J K flip-flop – Comment on this statement.
  21. If Q output of D flip-flop is connected to its D input, verify that this circuit behaves as a T flip-flop.
  22. Verify that the circuit shown in figure 1 behaves as J K flip-flop.
  23. Prepare the truth table for the circuit shown in figure 2 and show that it works as R S flip-flop.
  24. Verify that the circuit shown in figure 3, works as T – type of flip-flop.
  25. A clock is connected to an S R flip-flop, as shown in figure 4; draw the output waveform in relation to clock. Also, mention the function it performs.